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Assertion (A): When all inputs of a NAND-gate are shorted to get a one input, one output gate, it becomes an inverter.Reason (R): When all inputs of a NAND-gate are at logic 'O' level, the output is a
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For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the input be LOW. What is the status of the Y output

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