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Programmable Logic Device
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Programmable Logic Device
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In the GAL16V8, the ________ selects the signal that is fed back into the input matrix
GAL is an acronym for ________
General Array Logic
Generic Array Logic
Giant Array Logic
Generic Analysis Logic
The EPM 7128S is a(n) ________ device
FPGA is the acronym for ________
Field Programmer's Gate Assembly
Field Programmable Generic Array
Field Programmable Gate Array
Flexible Programming [of] Generic Assemblies
A macrocell basically contains ________
an OR-gate array and some output logic
an AND-OR gate array and some output logic
a programmable AND-OR gate array and some input buffers
What does the Altera FLEX10K PLD use in place of AND and OR arrays
Nothing, it uses AND and OR arrays.
What is an OTP device
Optical transporting port
Operational topical portable
Octal transmitting pixel
The GAL16V8 has architecture that is very similar to the ________ device
How many macrocells are in a MAX700S LAB
The distinction between CPLDs and FPGAs is ________
A GAL22V10 ________
is downloadable from the manufacturer's Web site
has up to 32 inputs and 10 outputs
is a type of SPLD
has 10 inputs and 22 outputs
________ is a mature technology consisting of numerous subfamilies that have been developed over many years of use
None of the above
The MAX+PLUS II compiler will automatically program a macrocell to borrow up to ________ product terms from each of the 3 adjacent macrocells in the same LAB
The programming technologies that are used in FPGA devices include SRAM, flash, and antifuse, with ________ being the most common
SRAM and flash
The field programmable logic array was the first ________ programmable logic device
Cascade chains are closely associated with ________
All of the above
Most look-up tables in field-programmable gate arrays (FGPAs) use ________ inputs, resulting in ________ possible outputs
ALM is the acronym for ________
Arithmetic Logic Module
Asynchronous Local Modulator
Array Logic Matrix
Adaptive Logic Module
What is another name for digital circuitry called sequential logic
flip-flop memory circuitry
The flexibility of the GAL16V8 is in its ________
programmable output logic macro cells
A PAL16L8 has
16 inputs and 8 outputs.
10 inputs and 8 outputs.
8 inputs and 8 outputs.
16 inputs and 16 outputs.
What gives a GAL its flexibility
Its programmable OLMCs
Its reprogrammable EPROM
Its large logic arrays
Most FPGA logic modules utilize a(n) ________ approach to create the desired logic functions
AND and OR array
MPGA stands for
memory programmed ROM.
Morgan-Phillips gated array.
mass produced gated array.
mask programmed ROM.
Which of the following increases the number of product terms by borrowing unused product from other macrocells
The major structures in the MAX7000S are the ________ and ________
A(n) ________ is a section of embedded logic that is commonly found in FPGAs
Four subcategories of ASIC devices are available to create digitalsystems.
These are PLDs, gate arrays, standard cells, and ________
The macrocells in a PAL/GAL are located ________
ahead of the programmable AND arrays
after the programmable AND arrays
at the input terminals
at the output terminals
A circuit that implements a combinational logic function by storing a list of output values that correspond to all possible input combinations is a(n) ________
output logic macrocell
parallel logic expander